switching based SAR ADC
Merged capacitor switching based SAR ADC with highest switching energy-efficiency FREE-DOWNLOAD [PDF]V Hariprasath, J Guerber, SH Lee… – Electronics letters, 2010 A modified merged capacitor switching (MCS) scheme is proposed for the successive approximation register (SAR) analogue-to-digital con- verter (ADC). The conventional MCS technique previously applied to a pipelined ADC improves signal processing speed and, with use […]
2-stage pipeline ADC
A 12b 50MS/s 3.5 mW SAR assisted 2-stage pipeline ADC FREE-DOWNLOAD [PDF] CC Lee… – VLSI Circuits (VLSIC), 2010 research A 12b 50MS/s ADC is presented that pipelines a first stage 6b MDAC with a second stage 7b SAR ADC. The first stage uses a low-power SAR architecture for the sub-ADC, to achieve the large 6b stage resolution. A […]
CMOS ADC-2
A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques FREE-DOWNLOAD [PDF] HC Choi, YJ Kim, KH Lee… – International Journal of Mathematical and computer models in multi-pass ADC design and optimizationfree downloadThe paper presents a mathematically grounded approach to the analysis and optimisation of multi-pass analogue-to-digital converters (MADCs) with the algorithmic […]