ADC linearity testing
High-resolution ADC linearity testing using a fully digital-compatible BIST strategy FREE-DOWNLOAD [PDF] H Xing, H Jiang, D Chen… – … and Measurement, research …, 2009 Abstract—This paper proposes a digital-compatible built-in self-test (BIST) strategy for high-resolution analog-to-digital converter (ADC) linearity testing using only digital testing envi- ronments. The on-chip stimulus generator consists of three low- resolution and […]
ADC performance
How the voltage reference affects ADC performance FREE-DOWNLOAD [PDF] B Baker… – Analog Applications, 2009 High-Performance Analog Products Introduction When designing a mixed-signal system, many designers have a tendency to examine and optimize each component separately. This
low power ADC design
High speed and low power ADC design with dynamic analog circuits FREE-DOWNLOAD [PDF] A Matsuzawa – ASIC, 2009. ASICON’09. research 8th International …, 2009 FoM of SAR ADCs has decreased 1/200 dulling past three years. Rapid technology change has been emerged. A SAR ADC consists ofno OpAmps, reference ladders and bias circuits, but capacitor arrays, switches, logics, and […]