intellectual property reuse
IPRAIL–intellectual property reuse-based analog IC layout automation* 1 FREE-DOWNLOAD [PDF] N Jangkrajarng, S Bhattacharya, R Hartono… – Integration, the VLSI This paper presents a computer-aided design tool, IPRAIL, which automatically retargets existing analog layouts for technology migration and new design specifications. The reuse-based methodology adopted in IPRAIL utilizes expert designer knowledge embedded in analog layouts
Analog layout synthesis
Analog layout synthesis: recent advances in topological approaches FREE-DOWNLOAD [PDF] H Graeb, F Balasa, R Castro-Lopez… – Proceedings of the …, 2009 Abstract—This paper gives an overview of some recent advances in topological approaches to analog layout synthesis and in layout-aware analog sizing. The core issue in these approaches is the modeling of layout constraints for an efficient exploration process. […]
Layout tools for analog ICs
Layout tools for analog ICs and mixed-signal SoCs: a survey FREE-DOWNLOAD [PDF] RA Rutenbar… – … of the 2000 international symposium on Abstract-Layoutfor analog circuits has historically been a time- consuming, manual, trial-and-error task. The problem is not so much the size (in terms of the number of active devices) of these de- signs, but rather the plethora […]